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A NOR gate and a NAND gate are connected as shown in the figure. Two different sets of inputs are given to this setup. In the first case, the inputs to the gates are $A=0, B=0$, $C=0 .$ In the second case, the inputs are $A=1, B=0, C=1 .$ The output $D$ in the first case and second case respectively are 
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1 and 1
In first case $A=0, B=0$
$\therefore$ Output of NOR gate, $Y=\overline{A+B}=1$
This output is the input for NAND gate, $i . e ., Y=1$
and $C=0$
$\therefore \quad D=\overline{Y \cdot C}=1$
In second case $A=1, B=0$
$\therefore$ Output of NOR gate, $Y=\overline{A+B}=0$
This output is the input for NAND gate $i . e . . Y=0$
and $C=1$
$\therefore \quad D=\overline{Y \cdot C}=1$
$\therefore$ Output of NOR gate, $Y=\overline{A+B}=1$
This output is the input for NAND gate, $i . e ., Y=1$
and $C=0$
$\therefore \quad D=\overline{Y \cdot C}=1$
In second case $A=1, B=0$
$\therefore$ Output of NOR gate, $Y=\overline{A+B}=0$
This output is the input for NAND gate $i . e . . Y=0$
and $C=1$
$\therefore \quad D=\overline{Y \cdot C}=1$
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