Truth table for AND, OR, NAND and NOR gate for two input $A$ and $B$ are given below.
AND gate
\begin{array}{|ccc|}
\hlineA & B & Output Y=A B \\
\hline 0 & 0 & 0 \\
\hline 0 & 1 & 0 \\
\hline 1 & 0 & 0 \\
\hline 1 & 1 & 1 \\
\hline
\end{array}
OR gate
\begin{array}{|llc|}
\hlineA & B & Output Y=A+B \\
\hline 0 & 0 & 0 \\
\hline 0 & 1 & 1 \\
\hline 1 & 0 & 1 \\
\hline 1 & 1 & 1 \\
\hline
\end{array}
NOR gate
\begin{array}{|cccc|}
\hlineA & B & A+B & Output Y=\bar{A}+\bar{B} \\
\hline 0 & 0 & 0 & 1 \\
\hline 0 & 1 & 1 & 0 \\
\hline 1 & 0 & 1 & 0 \\
\hline 1 & 1 & 0 & 0 \\
\hline
\end{array}
NAND gate
\begin{array}{|rrrc|}
\hlineA & B & A+B & Output Y=\overline{A B} \\
\hline 0 & 0 & 0 & 1 \\
\hline 0 & 1 & 0 & 1 \\
\hline 1 & 0 & 0 & 1 \\
\hline 1 & 1 & 1 & 0 \\
\hline
\end{array}
From above truth tables, it is clear that in NOR and NAND gate, if all the inputs are low, then their outputs are high.